AMD, NVIDIA raise bar on AI energy efficiency

AMD and NVIDIA are engineering AI processors that deliver more training and inference capacity per server rack. This matters because data centres now consume 2–3% of US electricity, and that share is rising sharply as organisations deploy large language models and real-time AI workloads.

Community pressure is real. Local utilities and municipal governments across the United States have begun questioning new data centre expansions – not from environmental ideology, but from grid-strain reality. NVIDIA's H100 and H200 chips, along with AMD's MI300 series, reduce the number of servers required for equivalent computational output. Fewer racks means lower cooling demand, reduced power delivery infrastructure, and lower operational carbon intensity per inference.

But efficiency gains alone don't eliminate the problem. A chipmaker can halve power-per-operation and still see total data centre electricity rise if AI workloads triple. The real question is whether efficiency improvements outpace demand growth – and whether they're paired with actual grid decarbonisation efforts, not just relocated consumption.

What's absent from the efficiency narrative: chipmakers' own Scope 3 disclosure. Manufacturing a single advanced processor consumes thousands of kilowatt-hours. If AMD and NVIDIA want credibility on energy efficiency, they need to publish full supply-chain carbon accounts – wafer fabrication, packaging, transport – and verify them against GHG Protocol Scope 3 standards. Efficiency in use is half the story. Manufacturing transparency is the other half.